Modified duobinary signalling
Simulink was used for the NRZ simulation and Quartus for modified duobinary signalling implementation. The duobinary signal generated is a three level signal which current commercial FPGAs are not capable of handling. Two real-world channels were used: The BER for NRZ and duobinary were modified duobinary signalling computed for both channels the results were comparable; however, the duobinary uses half of the bandwidth.
NRZ and duobinary coding are chosen because they are generally less complex than PAM-4, which makes modified duobinary signalling a good choice for higher data rates. At the receiver side, the duobinary decoder is implemented using a signal splitter, two comparators, and an XNOR gate. A typical duobinary transceiver system comprises of an encoder at the transmitter and the corresponding decoder at the receiver. The duobinary signal is then transmitted to the communication channel. Modified duobinary signalling and duobinary coding are chosen because they are generally less complex than PAM-4, which makes them a good choice for higher data rates.
March 07, Modified duobinary signalling Members: Master Thesis Date of Defense: This is mainly a result of the frequency dependent nature of such channels. The most common line coding method is NRZ; however, as speed further increases, duobinary and PAM-4 are also promising techniques being investigated.
This scheme offers the advantage of allowing us to use the FPGA equalizers in the NRZ coding without having to modify them to support the three-level duobinary signal. The duobinary signal generated is a three level signal which current commercial FPGAs are not capable of handling. The complete encoderconsists of a duobinary pre-coder, which in turn includes a unit delay and an XOR gate to prevent error propagation, and a delay and add filter that converts the two level NRZ signal into a three level duobinary signal.
Hence, this modified architecture takes advantage of the well-developed digital signal processing blocks in commercial FPGAs while modified duobinary signalling faster development times. Two real-world channels were used: NRZ and modified duobinary signalling coding are chosen because they are generally less complex than PAM-4, which makes them a good choice for higher data rates. In order to solve this problem, a simple new architecture of a duobinary system to be used with the commercial, off-the-shelf FPGAs is proposed.